1. Field of Invention
The present invention relates to a semiconductor package. More particularly, the present invention relates to a cascade-type chip module.
2. Description of Related Art
The trend for electrical products is to be light, short, small and thin. Not only chip manufacturing technology but also packaging technology is developing rapidly to keep pace with this trend. Since width of a chip is reducing quickly, chip integration is increasing and chip volume is decreasing. As a result, it is an important task to develop a new packaging technology, which is able to form a small volume package.
Memory modules, for example, are common semiconductor products. Memory modules are generally formed by the following steps. Chips are first packaged, and then the packages are attached to a printed circuit board. Area occupied by the packages is large, so the packaging density is low.
FIG. 1 is a schematic, top view of a conventional dynamic random access memory (DRAM) module, and FIG. 2 is a schematic, cross-sectional view of FIG. 1 along a line II--II.
Referring to FIGS. 1 and 2, a die 12 is attached to a leadframe (not shown) and sealed in a packaging material 16 to form a package 10. During the assembly process, the package 10 is attached to a printed circuit board 18 through leads 14 by surface mounting technology (SMT). The leads 14 couple with contacts 20 on the printed circuit board 18. By traces 22, the package 10 can couple with other packages 10 and gold fingers 24 on the printed circuit board 18.
Although technology such as chip on board (COB), flip chip (FC), tape automatic bonding (TAB) or stack up is used to increase the packaging density, the increment of the packaging density is limited by factors like the area occupied by the traces on the substrate, the volume of each chip or the pitch between the leads.